Interrupt Ed Structure - Freescale Semiconductor MPC5200B User Manual

Host Controller Interface
16
24
20
12
28
18
10
26
22
Interrupt
14
Headpointers
30
17
25
21
13
29
19
11
27
23
15
31
Figure 12-5 shows a sample interrupt endpoint schedule. The schedule shows:
• two endpoint descriptors at a 1ms poll interval
• two endpoint descriptors at a 2ms poll interval
• one endpoint descriptor at a 4ms poll interval
• two endpoint descriptors at an 8ms poll interval
• two endpoint descriptors at a 16ms poll interval
• two endpoint descriptors at a 32ms poll interval.
Unused interrupt endpoint placeholders are bypassed and the link is connected to the next available
endpoint in the hierarchy.
12-4
0
8
4
2
6
1
9
5
3
7
32 16 8 4
Endpoint Poll Interval (ms)
Figure 12-4. Interrupt ED Structure
MPC5200B Users Guide, Rev. 1
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NOTE
Interrupt
Endpoint
Descriptor
Placeholder
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