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BestComm DMA Registers—MBAR+0x1200
16
17
R
W
RESET:
0
0
Bit
Name
0:7
IPR8
8:15
IPR9
16:23
IPR10
24:31
IPR11
13.15.19 SDMA Initiator Priority 12 Register—MBAR + 0x1248
SDMA Initiator Priority 13 Register—MBAR + 0x1249
SDMA Initiator Priority 14 Register—MBAR + 0x124A
SDMA Initiator Priority 15 Register—MBAR + 0x124B
msb 0
1
R
W
RESET:
0
0
16
17
R
W
RESET:
0
0
Bit
Name
0:7
IPR12
8:15
IPR13
13-16
18
19
20
21
22
IPR10
0
0
0
0
0
Initiator Priority register for initiator 8 (or Task8 if PtdControl[16]=1)
Same bit layout as IPR0
Initiator Priority register for initiator 9 (or Task9 if PtdControl[16]=1)
Same bit layout as IPR0
Initiator Priority register for initiator 10 (or Task10 if PtdControl[16]=1)
Same bit layout as IPR0
Initiator Priority register for initiator 11 (or Task11 if PtdControl[16]=1)
Same bit layout as IPR0
Table 13-19. SDMA Initiator Priority 12 Register
SDMA Initiator Priority 13 Register
SDMA Initiator Priority 14 Register
SDMA Initiator Priority 15 Register
2
3
4
5
6
IPR12
0
0
0
0
0
18
19
20
21
22
IPR14
0
0
0
0
0
Initiator Priority register for initiator 12 (or Task12 if PtdControl[16]=1)
Same bit layout as IPR0
Initiator Priority register for initiator 13 (or Task13 if PtdControl[16]=1)
Same bit layout as IPR0
MPC5200B Users Guide, Rev. 1
23
24
25
26
27
0
0
0
0
Description
7
8
9
10
11
0
0
0
0
23
24
25
26
27
0
0
0
0
Description
28
29
30
31 lsb
IPR11
0
0
0
0
0
12
13
14
15
IPR13
0
0
0
0
0
28
29
30
31 lsb
IPR15
0
0
0
0
0
Freescale Semiconductor
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