Freescale Semiconductor MPC5200B User Manual page 302

Register
Offset
0x74
0x78
0x7C
0x80
0x84
0x88
0x8C
0x90
...
0xF4
0xF8
0xFC
Table 10-3. PCI Communication System Interface Register Map
Register
Offset
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
...
0x3C
0x40
0x44
0x48
0x4C
0x50
0x54
Freescale Semiconductor
Table 10-2. PCI Register Map (continued)
Mnemonic
PCIIW1BTAR
PCIIW2BTAR
PCIIWCR
PCIICR
PCIISR
PCIARB
PCICAR
Mnemonic
PCITPSR
PCITSAR
PCITTCR
PCITER
PCITNAR
PCITLWR
PCITDCR
PCITSR
PCITPDCR
PCITFDR
PCITFSR
PCITFCR
PCITFAR
PCITFRPR
PCITFWPR
MPC5200B Users Guide, Rev. 1
Name
Initiator Window 1 Base/Translation Address Register
Initiator Window 2 Base/Translation Address Register
Reserved
Initiator Window Configuration Register
Initiator Control Register
Initiator Status Register
PCI Arbiter Register
Reserved
Configuration Address Register
Reserved
Name
Tx Packet Size
Tx Start Address
Tx Transaction Control Register
Tx Enables
Tx Next Address
Tx Last Word
Tx Bytes Done Counts
Tx Status
Tx Packets Done Counts
Reserved
Tx FIFO Data
Tx FIFO Status
Tx FIFO Control
Tx FIFO Alarm
Tx FIFO Read Pointer
Tx FIFO Write Pointer
Registers
10-5