Freescale Semiconductor MPC5200B User Manual page 312

Registers
20:30 Reserved Unused bits. Software should write zero to this register.
31 PCI This bit controls the external PCI RST. When this bit is cleared, the external PCI RST
Reset deasserts. Setting this bit does not reset the internal PCI controller. The application
(PR) software must not initiate PCI transactions while this bit is set. It is recommended that this
bit be programmed last.
The reset value of the bit is 1 (PCI RST asserted).
Note: A global PCI reset should be asserted just by the MPC5200B controller. Any
external common reset controller signal will be ignored by the internal PCI controller.
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 10-15