Battery Backup Domain; Ldo Voltage Regulator - ST STM32H7 3 Series Application Note

Power supplies
1.1.3

Battery backup domain

Backup domain description
To retain the content of the RTC backup registers, backup SRAM, and supply the RTC when
V is turned off, V
DD
supplied by a battery. Otherwise, V
When the backup domain is supplied by V
is not present), the following functions are available:
•
PC14 and PC15 can be used as LSE pins only.
•
PC13 can be used as tamper pin (TAMP1).
•
PI8 can be used as tamper pin (TAMP2).
•
PC1 can be used as tamper pin (TAMP3).
During t
RSTTEMPO
detected, the power switch between V
During the startup phase, if V
V + 0.6 V, a current may be injected into V
BAT
between V
V pin cannot support this current injection, it is strongly recommended to connect an
BAT
external low-drop diode between this power supply and the V
Refer to the device datasheets for the actual value of t
Battery charging
When V
DD
internal resistance. This operation can be performed either through an internal 5 kΩ or
1.5 kΩ resistor. The resistor value can be configured by software.
Battery charging is automatically disabled in V
1.1.4

LDO voltage regulator

The LDO voltage regulator is always enabled after reset with a default output level set to
1.0 V (VOS3). The LDO can operate in three different modes depending on the application
operating modes:
•
In Run mode, the regulator supplies full power to the core and the digital domain.
• In Stop mode, the regulator supplies low power to the core and to the digital domain,
thus preserving the contents of the registers and SRAM.
•
In Standby mode, the regulator is powered down. The contents of the registers and
SRAM are lost except for those related to the standby circuitry and the backup domain.
In Run and Stop mode, the LDO voltage regulator can be dynamical scaled by software to
different voltage levels: VOS1, VOS2, and VOS3, SVOS3, SVOS4 or SVOS5.
The LDO regulator requires a capacitor on VCAP pins.
10/48
pin can be connected to an optional 1.2-3.6 V standby voltage
BAT
(temporization at V
DD
and the power switch (V
DD
is present, the external battery connected to V
DocID029918 Rev 1
must be connected to another source, such as V
BAT
(analog switch connected to V
BAT
startup) or after a power-down reset (PDR) is
DD
and V remains connected to V
BAT DD
is established in less than t
pin through an internal diode connected
BAT
). If the power supply/battery connected to the
BAT
mode.
BAT
BAT
and it is higher than
RSTTEMPO
pin.
BAT
.
RSTTEMPO
can be charged through an
BAT
AN4938
.
DD
since V
BAT DD
.