Usb Status Register (Usbs) - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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USB Registers
Table 32-11. USBER/USBMR Field Descriptions (Continued)
Bits
Name
8–1
TXEn
Transmit error.
1
0 No event
1 An error occurred during transmission for endpoint n. Either the packet was not acknowledged
(function), a NAK/STALL handshake was received (host), or an underrun occurred. The specific
event is reflected in the status bits of the TxBD; see Section 32.8.2, "USB Transmit Buffer Descriptor
(TxBD)."
12
SOF
Start of frame.
0 No event
1 A start-of-frame packet has been received. The packet is stored in the FRAME_N parameter RAM
entry; see Section 32.6, "USB Parameter RAM."
13
BSY
Busy condition.
0 No event
1 Received data has been discarded due to a lack of buffers. Set after the first character is received
for which there is no receive buffer available.
14
TXB
Transmit buffer.
0 No event
1 A buffer has been sent. Set when the transmit data of the last character in the buffer is written to the
transmit FIFO.
15
RXB
Receive buffer.
0 No event
1 A buffer has been received. Set after the last character has been written to the receive buffer and
the RxBD is closed.

32.7.6 USB Status Register (USBS)

The USB status (USBS) register, shown in Figure 32-12, monitors the real-time status of
the USB lines.
Bit
0
Field
Reset
R/W
Addr
Table 32-12 describes the USBS fields.
Bits
Name
0–6
Reserved and should be cleared.
7
IDLE
Idle status. Set when an idle condition is detected on the USB lines. Cleared when the bus is not idle.
1
2
Figure 32-12. USB Status Register (USBS)
Table 32-12. USBS Field Descriptions
MPC850 Family User's Manual
Description
3
4
0000_0000
R/W
0XA17
Description
5
6
IDLE
7

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