Renesas H8S Series Hardware Manual page 149

Interrupt Origin of
Source Interrupt Source
— Reserved for
system use
SCI RXI_0
channel 0
TXI_0
SCI RXI_1
channel 1
TXI_1
SCI RXI_2
channel 2
TXI_2
HCAN Reserved for system
use
RM0
Reserved for system
use
MMT TGIMN
TGINN
— Reserved for system
use
Note: * DTCE bits with no corresponding interrupt are reserved, and should be written with 0.
Section 8 Data Transfer Controller (DTC)
Vector DTC
Number Vector Address
64 H'0480
65 H'0482
68 H'0488
69 H'048A
72 H'0490
73 H'0492
74 H'0494
75 H'0496
81 H'04A2
82 H'04A4
85 H'04AA
86 H'04AC
89 H'04B2
90 H'04B4
104 H'04D0
105 H'04D2
106 H'04D4
107 H'04D6
108 H'04D8
109 H'04DA
110 H'04DC
111 H'04DE
Rev. 6.00 Mar 15, 2006 page 113 of 570
DTCE *
Priority
DTCED3 High
DTCED2
DTCED1
DTCED0
DTCEE7
DTCEE6
DTCEE5
DTCEE4
DTCEE3
DTCEE2
DTCEE1
DTCEE0
DTCEF7
DTCEF6
DTCEG7
DTCEG6
DTCEG5
DTCEG4
DTCEG3
DTCEG2
DTCEG1
DTCEG0 Low
REJ09B0211-0600