Renesas H8S Series Hardware Manual page 82

16-bit single-chip microcomputer
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Section 2 CPU
Table 2.13 Effective Address Calculation
Addressing Mode and Instruction Format
Register direct (Rn)
Register indirect (@ERn)
Register indirect with post-increment or
pre-decrement
• Register indirect with post-increment @ERn+
• Register indirect with pre-decrement @−ERn
Rev. 6.00 Mar 15, 2006 page 46 of 570
REJ09B0211-0600
Effective Address Calculation
General register contents
General register contents
Sign extension
General register contents
1, 2, or 4
General register contents
1, 2, or 4
Operand Size
Byte
Word
Longword
Effective Address (EA)
Operand is general register contents.

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