11.5
Interrupts
When the TGFM (TGFN) flag is set to 1 in the timer status register (TSR) by a compare match
between TCNT and the TPDR register (2Td), and if the TGIEM (TGIEN) bit setting in the timer
control register (TCNR) is 1, an interrupt is requested. The interrupt request is cleared by clearing
the TGF flag to 0.
Table 11.3 MMT Interrupt Sources
Name
Interrupt Source
TGIMN
Compare match between TCNT and TPDR
TGINN
Compare match between TCNT and 2Td
The on-chip DTC can be activated by a compare match between TCNT and TPDR or between
TCNT and 2Td.
Section 11 Motor Management Timer (MMT)
Interrupt Flag
TGFM
TGFN
Rev. 6.00 Mar 15, 2006 page 263 of 570
DTC Activation
Yes
Yes
REJ09B0211-0600