Section 15 Controller Area Network (HCAN)
15.3.11 Interrupt Register (IRR)
The interrupt register (IRR) is a 16-bit interrupt status flag register.
Bit
Bit Name
Initial Value
15
IRR7
0
14
IRR6
0
13
IRR5
0
Rev. 6.00 Mar 15, 2006 page 400 of 570
REJ09B0211-0600
R/W
Description
R/(W) * Overload Frame
[Setting condition]
•
When an overload frame is transmitted
[Clearing condition]
•
Writing 1
R/(W) * Bus Off Interrupt Flag
Status flag indicating the bus off state caused by the
transmit error counter.
[Setting condition]
•
When TEC ≥ 256
[Clearing condition]
•
Writing 1
R/(W) * Error Passive Interrupt Flag
Status flag indicating the error passive state caused
by the transmit/receive error counter.
[Setting condition]
•
When TEC ≥ 128 or REC ≥ 128
[Clearing condition]
•
Writing 1