Interrupts During Execution Of Eepmov Instruction - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Section 5 Interrupt Controller

Interrupts during Execution of EEPMOV Instruction

Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.

With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer

is not accepted until the move is completed.

With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt

exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this

case is the address of the next instruction.

Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the

following coding should be used.

Rev. 6.00 Mar 15, 2006 page 88 of 570

REJ09B0211-0600