Port A; Port A Data Direction Register (Paddr) - Renesas H8S Series Hardware Manual

9.4

Port A

Port A is a 4-bit I/O port that also has other functions. Port A has the following registers. For
details on register addresses and register states during each processing, refer to appendix A, On-
Chip I/O Register.

• Port A data direction register (PADDR)

• Port A data register (PADR)
• Port A register (PORTA)
• Port A pull-up MOS control register (PAPCR)
• Port A open-drain control register (PAODR)
9.4.1 Port A Data Direction Register (PADDR)
PADDR is an 8-bit write-only register, the individual bits of which specify whether the pins of
port A are used for input or output. PADDR cannot be read; if it is, an undefined value will be
read.
Bit Bit Name
7 —
6 —
5 —
4 —
3 PA3DDR
2 PA2DDR
1 PA1DDR
0 PA0DDR
Initial Value R/W
Undefined —
Undefined —
Undefined —
Undefined —
0 W
0 W
0 W
0 W
Description
Reserved
When a pin is specified as a general purpose I/O
port, setting this bit to 1 makes the corresponding
port A pin an output pin. Clearing this bit to 0 makes
the pin an input pin.
Rev. 6.00 Mar 15, 2006 page 137 of 570
Section 9 I/O Ports
REJ09B0211-0600