Mmt Pin Control Register (Mmtpc) - Renesas H8S Series Hardware Manual

Section 11 Motor Management Timer (MMT)
they match the TCNT counter changes its count direction from up to down. Only 16-bit access can
be used on TPDR; 8-bit access is not possible.

11.3.11 MMT Pin Control Register (MMTPC)

The MMTPC is an 8-bit readable/writable register that enables or disables usage of the MMT pins.
Bit Bit Name
7 PWOBE
6 PWOAE
5 PVOBE
4 PVOAE
3 PUOBE
2 PUOAE
1 PCOE
0 PCIE
Rev. 6.00 Mar 15, 2006 page 252 of 570
REJ09B0211-0600
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
PWOB enabled
0: PB7 pin is port I/O pin/TPU I/O pin
1: PB7 pin is PWOB output pin of MMT
PWOA enabled
0: PB6 pin is port I/O pin/TPU I/O pin
1: PB6 pin is PWOA output pin of MMT
PVOB enabled
0: PB5 pin is port I/O pin/TPU I/O pin
1: PB5 pin is PVOB output pin of MMT
PVOA enabled
0: PB4 pin is port I/O pin/TPU I/O pin
1: PB4 pin is PVOA output pin of MMT
PUOB enabled
0: PB3 pin is port I/O pin/TPU I/O pin
1: PB3 pin is PUOB output pin of MMT
PUOA enabled
0: PB2 pin is port I/O pin/TPU I/O pin
1: PB2 pin is PUOA output pin of MMT
PCO enabled
0: PB1 pin is port I/O pin/TPU I/O pin
1: PB1 pin is PCO output pin of MMT
PCI enabled
0: PB0 pin is port I/O pin/TPU I/O pin
1: PB0 pin is PCI output pin of MMT