Renesas H8S Series Hardware Manual page 568

Appendix
Register Name
Timer period data register
Timer period buffer register
Timer dead time data register
MMT pin control register
Timer buffer register U
(for a buffer operation)
Timer general register UU
Timer general register U
Timer general register UD
Timer dead time counter 0
Timer dead time counter 1
Timer buffer register U
(for a free operation)
Timer buffer register V
(for a buffer operation)
Timer general register VU
Timer general register V
Timer general register VD
Timer dead time counter 2
Timer dead time counter 3
Timer buffer register V
(for a free operation)
Timer buffer register W
(for a buffer operation)
Timer general register WU
Timer general register W
Timer general register WD
Timer dead time counter4
Timer dead time counter5
Timer buffer register W
(for a free operation)
Input level control/status register
POE pin control register
Standby control register
Rev. 6.00 Mar 15, 2006 page 532 of 570
REJ09B0211-0600
Abbrevia-
Bit No. Address * Module
tion
TPDR 16
TPBR 16
TDDR 16
MMTPC 8
TBRU 16
TGRUU 16
TGRU 16
TGRUD 16
TDCNT0 16
TDCNT1 16
TBRU 16
TBRV 16
TGRVU 16
TGRV 16
TGRVD 16
TDCNT2 16
TDCNT3 16
TBRV 16
TBRW 16
TGRWU 16
TGRW 16
TGRWD 16
TDCNT4 16
TDCNT5 16
TBRW 16
ICSR 16
POEPC 8
SBYCR 8
H'FB08 MMT
H'FB0A MMT
H'FB0C MMT
H'FB0E MMT
H'FB10 MMT
H'FB12 MMT
H'FB14 MMT
H'FB16 MMT
H'FB18 MMT
H'FB1A MMT
H'FB1C MMT
H'FB20 MMT
H'FB22 MMT
H'FB24 MMT
H'FB26 MMT
H'FB28 MMT
H'FB2A MMT
H'FB2C MMT
H'FB30 MMT
H'FB32 MMT
H'FB34 MMT
H'FB36 MMT
H'FB38 MMT
H'FB3A MMT
H'FB3C MMT
H'FC00 POE
H'FC02 POE
H'FDE4 SYSTEM 8
Data Access
Width State
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
16 3
2