Renesas H8S Series Hardware Manual page 201

16-bit single-chip microcomputer

Hide thumbs Also See for H8S Series:

Table of Contents

Section 10 16-Bit Timer Pulse Unit (TPU)

• Timer I/O control register H_3 (TIORH_3)

• Timer I/O control register L_3 (TIORL_3)

• Timer interrupt enable register_3 (TIER_3)

• Timer status register_3 (TSR_3)

• Timer counter_3 (TCNT_3)

• Timer general register A_3 (TGRA_3)

• Timer general register B_3 (TGRB_3)

• Timer general register C_3 (TGRC_3)

• Timer general register D_3 (TGRD_3)

• Timer control register_4 (TCR_4)

• Timer mode register_4 (TMDR_4)

• Timer I/O control register _4 (TIOR_4)

• Timer interrupt enable register_4 (TIER_4)

• Timer status register_4 (TSR_4)

• Timer counter_4 (TCNT_4)

• Timer general register A_4 (TGRA_4)

• Timer general register B_4 (TGRB_4)

• Timer control register_5 (TCR_5)

• Timer mode register_5 (TMDR_5)

• Timer I/O control register_5 (TIOR_5)

• Timer interrupt enable register_5 (TIER_5)

• Timer status register_5 (TSR_5)

• Timer counter_5 (TCNT_5)

• Timer general register A_5 (TGRA_5)

• Timer general register B_5 (TGRB_5)

Common Registers

• Timer start register (TSTR)

• Timer synchro register (TSYR)

Rev. 6.00 Mar 15, 2006 page 165 of 570

REJ09B0211-0600