Figure 2.11 Instruction Formats (Examples) - Renesas H8S Series Hardware Manual

• Operation Field
Indicates the function of the instruction, the addressing mode, and the operation to be carried
out on the operand. The operation field always includes the first four bits of the instruction.
Some instructions have two operation fields.
• Register Field
Specifies a general register. Address registers are specified by 3 bits, and data registers by 3
bits or 4 bits. Some instructions have two register fields. Some have no register field.
• Effective Address Extension
8, 16, or 32 bits specifying immediate data, an absolute address, or a displacement.
• Condition Field
Specifies the branching condition of Bcc instructions.
(1) Operation field only
(2) Operation field and register fields
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
op
op
op
r n
op
r n
EA (disp)
cc EA (disp)

Figure 2.11 Instruction Formats (Examples)

NOP, RTS, etc.
r m
ADD.B Rn, Rm, etc.
r m
MOV.B @(d:16, Rn), Rm, etc.
BRA d:16, etc.
Rev. 6.00 Mar 15, 2006 page 41 of 570
Section 2 CPU
REJ09B0211-0600