Renesas H8S Series Hardware Manual page 17

Section 11 Motor Management Timer (MMT)
11.1 Features ............................................................................................................................. 245
11.2 Input/Output Pins .............................................................................................................. 247
11.3 Register Descriptions ........................................................................................................ 247
11.3.1 Timer Mode Register (TMDR) ............................................................................ 248
11.3.2 Timer Control Register (TCNR) .......................................................................... 249
11.3.3 Timer Status Register (TSR)................................................................................ 250
11.3.4 Timer Counter (TCNT)........................................................................................ 250
11.3.5 Timer Buffer Registers (TBR) ............................................................................. 251
11.3.6 Timer General Registers (TGR)........................................................................... 251
11.3.7 Timer Dead Time Counters (TDCNT)................................................................. 251
11.3.8 Timer Dead Time Data Register (TDDR)............................................................ 251
11.3.9 Timer Period Buffer Register (TPBR) ................................................................. 251
11.3.10 Timer Period Data Register (TPDR).................................................................... 251
11.3.11 MMT Pin Control Register (MMTPC) ................................................................ 252
11.4 Operation .......................................................................................................................... 253
11.4.1 Sample Setting Procedure .................................................................................... 254
11.4.2 Output Protection Functions ................................................................................ 262
11.5 Interrupts ........................................................................................................................... 263
11.6 Operation Timing.............................................................................................................. 264
11.6.1 Input/Output Timing ............................................................................................ 264
11.6.2 Interrupt Signal Timing........................................................................................ 268
11.7 Usage Notes ...................................................................................................................... 270
11.7.1 Module Stop Mode Setting .................................................................................. 270
11.7.2 Notes for MMT Operation ................................................................................... 270
11.8 Port Output Enable (POE)................................................................................................. 274
11.8.1 Features................................................................................................................ 274
11.8.2 Input/Output Pins ................................................................................................. 275
11.8.3 Register Descriptions ........................................................................................... 275
11.8.4 Operation ............................................................................................................. 279
Section 12 Programmable Pulse Generator (PPG)
12.1 Features ............................................................................................................................. 281
12.2 Input/Output Pins .............................................................................................................. 283
12.3 Register Descriptions ........................................................................................................ 283
12.3.1 Next Data Enable Registers H, L (NDERH, NDERL)......................................... 284
12.3.2 Output Data Registers H, L (PODRH, PODRL).................................................. 285
12.3.3 Next Data Registers H, L (NDRH, NDRL) ......................................................... 286
12.3.4 PPG Output Control Register (PCR).................................................................... 289
12.3.5 PPG Output Mode Register (PMR)...................................................................... 290
12.4 Operation .......................................................................................................................... 291
........................................................... 245
.................................................... 281
Rev. 6.00 Mar 15, 2006 page xvii of xxxvi