Figure 10.15 Example Of Buffer Operation (1) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Examples of Buffer Operation

1. When TGR is an output compare register

Figure 10.15 shows an operation example in which PWM mode 1 has been designated for

channel 0, and buffer operation has been designated for TGRA and TGRC. The settings used

in this example are TCNT clearing by compare match B, 1 output at compare match A, and 0

output at compare match B.

As buffer operation has been set, when compare match A occurs the output changes and the

value in buffer register TGRC is simultaneously transferred to timer general register TGRA.

This operation is repeated each time that compare match A occurs.

For details of PWM modes, see section 10.4.5, PWM Modes.

Figure 10.15 Example of Buffer Operation (1)

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev. 6.00 Mar 15, 2006 page 207 of 570

REJ09B0211-0600