20.3
Sleep Mode
20.3.1
Transition to Sleep Mode
If SLEEP instruction is executed when the SBYCR SSBY bit = 0, the CPU enters the sleep mode.
In sleep mode, CPU operation stops, however the contents of the CPU's internal registers are
retained. Other supporting modules do not stop.
20.3.2
Clearing Sleep Mode
Sleep mode is cleared by any interrupt, or signals at the RES, or STBY pins.
• Exiting Sleep Mode by Interrupts:
When an interrupt occurs, sleep mode is exited and interrupt exception processing starts. Sleep
mode is not exited if the interrupt is disabled, or if interrupts other than NMI are masked by the
CPU.
• Exiting Sleep Mode by RES pin:
Setting the RES pin Low selects the reset state. After the stipulated reset input duration,
driving the RES pin High restart the CPU performing reset exception processing.
• Exiting Sleep Mode by STBY pin:
When the STBY pin level is driven low, a transition is made to hardware standby mode.
Section 20 Power-Down Modes
Rev. 6.00 Mar 15, 2006 page 499 of 570
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