Renesas H8S Series Hardware Manual page 574

Appendix
Register Name
Serial mode register_2
Bit rate register_2
Serial control register_2
Transmit data register_2
Serial status register_2
Receive data register_2
Smart card mode register_2
A/D data register AH
A/D data register AL
A/D data register BH
A/D data register BL
A/D data register CH
A/D data register CL
A/D data register DH
A/D data register DL
A/D control/status register
A/D control register
Flash memory control register 1
Flash memory control registe 2
Erase block register 1
Erase block register 2
Port 1 register
Port 4 register
Port 9 register
Port A register
Port B register
Port C register
Port D register
Port F register
Note: * Lower 16 bits of the address.
Rev. 6.00 Mar 15, 2006 page 538 of 570
REJ09B0211-0600
Abbrevia-
Bit No. Address * Module
tion
SMR_2 8
BRR_2 8
SCR_2 8
TDR_2 8
SSR_2 8
RDR_2 8
SCMR_2 8
ADDRAH 8
ADDRAL 8
ADDRBH 8
ADDRBL 8
ADDRCH 8
ADDRCL 8
ADDRDH 8
ADDRDL 8
ADCSR 8
ADCR 8
FLMCR1 8
FLMCR2 8
EBR1 8
EBR2 8
PORT1 8
PORT4 8
PORT9 8
PORTA 8
PORTB 8
PORTC 8
PORTD 8
PORTF 8
H'FF88 SCI_2
H'FF89 SCI_2
H'FF8A SCI_2
H'FF8B SCI_2
H'FF8C SCI_2
H'FF8D SCI_2
H'FF8E SCI_2
H'FF90 A/D
H'FF91 A/D
H'FF92 A/D
H'FF93 A/D
H'FF94 A/D
H'FF95 A/D
H'FF96 A/D
H'FF97 A/D
H'FF98 A/D
H'FF99 A/D
H'FFA8 ROM
H'FFA9 ROM
H'FFAA ROM
H'FFAB ROM
H'FFB0 PORT
H'FFB3 PORT
H'FFB8 PORT
H'FFB9 PORT
H'FFBA PORT
H'FFBB PORT
H'FFBC PORT
H'FFBE PORT
Data Access
Width State
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2
8 2