Section 13 Watchdog Timer; Features - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 13 Watchdog Timer

Section 13 Watchdog Timer
The watchdog timer (WDT) is an 8-bit timer that can generate an internal reset signal for this LSI
if a system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
The block diagram of the WDT is shown in figure 13.1.
13.1

Features

• Selectable from eight counter input clocks.
• Switchable between watchdog timer mode and interval timer mode.
In watchdog timer mode
• If the counter overflows, it is possible to select whether this LSI is internally reset or not.
In interval timer mode
• If the counter overflows, the WDT generates an interval timer interrupt (WOVI).
Rev. 6.00 Mar 15, 2006 page 303 of 570
REJ09B0211-0600

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