Renesas H8S Series Hardware Manual page 45

Type Symbol
Motor PUOA
manage-
ment timer
PUOB
(MMT)
PVOA
PVOB
PWOA
PWOB
PCI
PCO
POE3
POE2
POE1
POE0
Serial TxD2
communi- TxD1
cation TxD0
interface
RxD2
(SCI)/
RxD1
smart card
RxD0
interface
SCK2
SCK1
SCK0
HCAN HTxD
HRxD
Pin NO. I/O
28 Output
29 Output
30 Output
31 Output
32 Output
33 Output
24 Input
26 Output
37 Input
36
35
34
35 Output
19
16
36 Input
20
17
37 Input/
21 Output
18
6 Output
7 Input
Function
U-phase output pin for 6-phase non-overlap PWM
waveforms.
U-phase output pin for 6-phase non-overlap PWM
waveforms
V-phase output pin for 6-phase non-overlap PWM
waveforms.
V-phase output pin for 6-phase non-overlap PWM
waveforms.
W-phase output pin for 6-phase non-overlap
PWM waveforms.
W-phase output pin for 6-phase non-overlap
PWM waveforms.
Counter clear input pin by external input.
Output pin for toggle synchronized with 6-phase
non-overlap PWM waveforms.
Input pin for signal requesting to set the MMT
waveform output pin to the high-impedance state.
Data output pins.
Data input pins.
Clock input/output pins.
CAN bus transmission pin.
CAN bus reception pin.
Rev. 6.00 Mar 15, 2006 page 9 of 570
Section 1 Overview
REJ09B0211-0600