Figure 10.43 Timing For Status Flag Clearing By Dtc Activation - Renesas H8S Series Hardware Manual

Section 10 16-Bit Timer Pulse Unit (TPU)
DTC DTC
read cycle write cycle
T T T T
1 2 1 2
φ
Destination
Source address
Address
address
Status flag
Interrupt
request
signal

Figure 10.43 Timing for Status Flag Clearing by DTC Activation

Rev. 6.00 Mar 15, 2006 page 233 of 570
REJ09B0211-0600