Smart Card Interface Mode (When SMIF in SCMR is 1)
Bit
Bit Name
Initial Value
7
TIE
0
6
RIE
0
5
TE
0
4
RE
0
3
MPIE
0
2
TEIE
0
1
CKE1
0
0
CKE0
0
Legend:
X: Don't care
Section 14 Serial Communication Interface (SCI)
R/W
Description
R/W
Transmit Interrupt Enable
When this bit is set to 1, TXI interrupt request is
enabled.
R/W
Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt
requests are enabled.
R/W
Transmit Enable
When this bit is set to 1, transmission is enabled.
R/W
Receive Enable
When this bit is set to 1, reception is enabled.
R/W
Multiprocessor Interrupt Enable (enabled only when
the MP bit in SMR is 1 in asynchronous mode)
Write 0 to this bit in Smart Card interface mode.
R/W
Transmit End Interrupt Enable
Write 0 to this bit in Smart Card interface mode.
R/W
Clock Enable 0 and 1
Enables or disables clock output from the SCK pin.
The clock output can be dynamically switched in GSM
mode. For details, refer to section 14.7.8, Clock
Output Control.
When the GM bit in SMR is 0:
00: Output disabled (SCK pin can be used as an I/O
port pin)
01: Clock output
1X:Reserved
When the GM bit in SMR is 1:
00: Output fixed low
01: Clock output
10: Output fixed high
11: Clock output
Rev. 6.00 Mar 15, 2006 page 323 of 570
REJ09B0211-0600