Renesas H8S Series Hardware Manual page 312

Section 11 Motor Management Timer (MMT)
Bit Bit Name Initial Value
14 POE2F 0
13 POE1F 0
12 POE0F 0
11 to — All 0
9
8 PIE 0
Rev. 6.00 Mar 15, 2006 page 276 of 570
REJ09B0211-0600
R/W Description
R/(W) *
POE2 Flag
Indicates that a high impedance request has been
input to the POE2 pin.
[Setting condition]
•
When the input set by bits 4 and 5 of ICSR
occurs at the POE2 pin
[Clearing condition]
•
When 0 is written to POE2F after reading
POE2F = 1
R/(W) *
POE1 Flag
Indicates that a high impedance request has been
input to the POE1 pin.
[Setting condition]
•
When the input set by bits 2 and 3 of ICSR
occurs at the POE1 pin
[Clearing condition]
•
When 0 is written to POE1F after reading
POE1F = 1
R/(W) *
POE0 Flag
Indicates that a high impedance request has been
input to the POE0 pin.
[Setting condition]
•
When the input set by bits 0 and 1 of ICSR
occurs at the POE0 pin
[Clearing condition]
•
When 0 is written to POE0F after reading
POE0F = 1
— Reserved
These bits are always read as 0. Only 0 should be
written to these bits.
R/W Port Interrupt Enable
Enables or disables an interrupt request when 1 is
set in any of bits POE0F to POE3F in ICSR.
0: Interrupt request disabled
1: Interrupt request enabled