Table 14.6 Brr Settings For Various Bit Rates (Clocked Synchronous Mode); Table 14.7 Maximum Bit Rate With External Clock Input (Clocked Synchronous Mode) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 14 Serial Communication Interface (SCI)

Table 14.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode)

4
Bit Rate
(bit/s)
n
N
110
250
2
249
500
2
124
1k
1
249
2.5k
1
99
5k
0
199
10k
0
99
25k
0
39
50k
0
19
100k
0
9
250k
0
3
500k
0
1
0 *
1M
0
2.5M
5M
Legend:
Blank: Cannot be set.
—:
Can be set, but there will be a degree of error.
Continuous transfer is not possible.
*:

Table 14.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode)

External Input
φ φ φ φ (MHz)
Clock (MHz)
4
0.6667
6
1.0000
8
1.3333
10
1.6667
12
2.0000
Rev. 6.00 Mar 15, 2006 page 336 of 570
REJ09B0211-0600
Operating Frequency φ φ φ φ (MHz)
8
n
N
n
3
124
2
249
2
124
1
199
1
1
99
1
0
199
0
0
79
0
0
39
0
0
19
0
0
7
0
0
3
0
0
1
0
Maximum Bit
φ φ φ φ (MHz)
Rate (bit/s)
666666.7
14
1.000000.0
16
1333333.3
18
1666666.7
20
2000000.0
10
16
N
n
N
3
249
3
124
2
249
249
2
99
124
1
199
249
1
99
99
0
159
49
0
79
24
0
39
9
0
15
4
0
7
0
3
0 *
External Input
Clock (MHz)
2.3333
2.6667
3.0000
3.3333
20
n
N
2
124
1
249
1
124
0
199
0
99
0
49
0
19
0
9
0
4
0
1
0 *
0
Maximum Bit
Rate (bit/s)
2333333.3
2666666.7
3000000.0
3333333.3

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