Section 14 Serial Communication Interface (SCI)
Bit
Bit Name
Initial Value
2
MP
0
1
CKS1
0
0
CKS0
0
Rev. 6.00 Mar 15, 2006 page 318 of 570
REJ09B0211-0600
R/W
Description
R/W
Multiprocessor Mode (enabled only in asynchronous
mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and
O/E bit settings are invalid in multiprocessor mode.
R/W
Clock Select 0 and 1
R/W
These bits select the clock source for the baud rate
generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relationship between the bit rate register setting
and the baud rate, see section 14.3.9, Bit Rate
Register (BRR). n is the decimal representation of the
value of n in BRR (see section 14.3.9, Bit Rate
Register (BRR)).