Input/Output Pins; Register Descriptions; Table 11.1 Pin Configuration - Renesas H8S Series Hardware Manual

11.2

Input/Output Pins

Table 11.1 shows the pin configuration of the MMT.

Table 11.1 Pin Configuration

Name
PCI
PCO
PUOA
PUOB
PVOA
PVOB
PWOA
PWOB
11.3

Register Descriptions

The MMT has the following registers. These registers are initialized on power-on reset or in
hardware standby mode. They are not initialized in module stop mode or software standby mode.
For details on register addresses, refer to appendix A, On-Chip I/O Register.
• Timer mode register (TMDR)
• Timer control register (TCNR)
• Timer status register (TSR)
• Timer counter (TCNT)
• Timer buffer register U (TBRU)
• Timer buffer register V (TBRV)
• Timer buffer register W (TBRW)
• Timer general register UU (TGRUU)
• Timer general register VU (TGRVU)
• Timer general register WU (TGRWU)
• Timer general register U (TGRU)
• Timer general register V (TGRV)
• Timer general register W (TGRW)
• Timer general register UD (TGRUD)
I/O
Input
Output
Output
Output
Output
Output
Output
Output
Section 11 Motor Management Timer (MMT)
Function
Counter clear signal input
Toggle output synchronized with PWM period
PWMU phase output (positive phase)
PWMU phase output (negative phase)
PWMV phase output (positive phase)
PWMV phase output (negative phase)
PWMW phase output (positive phase)
PWMW phase output (negative phase)
Rev. 6.00 Mar 15, 2006 page 247 of 570
REJ09B0211-0600