Renesas H8S Series Hardware Manual page 35

Table 14.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode).................. 335
Table 14.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) ...................... 336
Table 14.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode)...... 336
Table 14.8 Examples of Bit Rate for Various BRR Settings (Smart Card Interface Mode)
(When n = 0 and S = 372) ...................................................................................... 337
Table 14.9 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
(When S = 372) ...................................................................................................... 337
Table 14.10 Serial Transfer Formats (Asynchronous Mode) ..................................................... 339
Table 14.11 SSR Status Flags and Receive Data Handling........................................................ 346
Table 14.12 SCI Interrupt Sources ............................................................................................. 376
Table 14.13 SCI Interrupt Sources ............................................................................................. 376
Section 15 Controller Area Network (HCAN)
Table 15.1 HCAN Pins............................................................................................................. 387
Table 15.2 Limits for Settable Value ....................................................................................... 418
Table 15.3 Setting Range for TSEG1 and TSEG2 in BCR ...................................................... 419
Table 15.4 HCAN Interrupt Sources ........................................................................................ 431
Section 16 A/D Converter
Table 16.1 Pin Configuration ................................................................................................... 439
Table 16.2 Analog Input Channels and Corresponding ADDR Registers................................ 441
Table 16.3 A/D Conversion Time (Single Mode) .................................................................... 446
Table 16.4 A/D Conversion Time (Scan Mode)....................................................................... 446
Table 16.5 A/D Converter Interrupt Source ............................................................................. 447
Table 16.6 Analog Pin Specifications ...................................................................................... 452
Section 18 ROM
Table 18.1 Differences between Boot Mode and User Program Mode.................................... 457
Table 18.2 Pin Configuration ................................................................................................... 461
Table 18.3 Setting On-Board Programming Modes................................................................. 466
Table 18.4 Boot Mode Operation............................................................................................. 468
Table 18.5 System Clock Frequencies for Which Automatic Adjustment of LSI Bit Rate Is
Possible ................................................................................................................ 468
Table 18.6 Flash Memory Operating States ............................................................................. 479
Table 18.7 Registers Present in F-ZTAT Version but Absent in Mask ROM Version ............ 480
Section 19 Clock Pulse Generator
Table 19.1 Damping Resistance Value .................................................................................... 484
Table 19.2 Crystal Resonator Characteristics........................................................................... 485
Table 19.3 External Clock Input Conditions ............................................................................ 486
Rev. 6.00 Mar 15, 2006 page xxxv of xxxvi