Section 20 Power-Down Modes; Table 20.1 Low Power Dissipation Mode Transition Conditions - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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In addition to the normal program execution state, this LSI has five power-down modes in which
operation of the CPU and oscillator is halted and power dissipation is reduced. Low-power
operation can be achieved by individually controlling the CPU, on-chip supporting modules, and
so on.
This LSI's operating modes are as follows:
(1) High-speed mode
(2) Medium-speed mode
(3) Sleep mode
(4) Module stop mode
(5) Software standby mode
(6) Hardware standby mode
(2) to (6) are power-down modes. Sleep mode is a CPU state, medium-speed mode is a CPU and
bus master state, and module stop mode is an internal peripheral function (including bus masters
other than the CPU) state. Some of these states can be combined.
After a reset, the LSI is in high-speed mode.
Figure 20.1 show a mode transition. Table 20.1 shows the conditions of transition between modes
when executing the SLEEP instruction and the state after transition back from low power mode
due to an interrupt. Table 20.2 shows the internal state of the LSI in each mode.
Note: MMT, PPG, PC break controller, and DTC are not implemented in the H8S/2614 and
H8S/2616.

Table 20.1 Low Power Dissipation Mode Transition Conditions

Status of Control
Bit at Transition
Pre-Transition
State
SSBY
High-speed/
0
Medium-speed
1

Section 20 Power-Down Modes

State after Transition
Invoked by SLEEP
Command
Sleep
Software standby
Section 20 Power-Down Modes
State after Transition Back
from Low Power Mode
Invoked by Interrupt
High-speed/Medium-speed
High-speed/Medium-speed
Rev. 6.00 Mar 15, 2006 page 491 of 570
REJ09B0211-0600

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