Renesas H8S Series Hardware Manual page 363

Smart Card Interface Mode (When SMIF in SCMR is 1)
Bit Bit Name Initial Value
7 TDRE 1
6 RDRF 0
Section 14 Serial Communication Interface (SCI)
R/W Description
R/W Transmit Data Register Empty
Displays whether TDR contains transmit data.
[Setting conditions]
•
When the TE bit in SCR is 0
•
When data is transferred from TDR to TSR and
data can be written to TDR
[Clearing conditions]
•
When 0 is written to TDRE after reading TDRE = 1
•
When the DTC is activated by a TXI interrupt
request and writes data to TDR
R/W Receive Data Register Full
Indicates that the received data is stored in RDR.
[Setting condition]
•
When serial reception ends normally and receive
data is transferred from RSR to RDR
[Clearing conditions]
•
When 0 is written to RDRF after reading RDRF = 1
•
When the DTC is activated by an RXI interrupt and
transferred data from RDR
The RDRF flag is not affected and retains their previous
values when the RE bit in SCR is cleared to 0.
Rev. 6.00 Mar 15, 2006 page 327 of 570
REJ09B0211-0600