Receive Complete Register (Rxpr) - Renesas H8S Series Hardware Manual

Section 15 Controller Area Network (HCAN)
15.3.9

Receive Complete Register (RXPR)

The receive complete register (RXPR) is a 16-bit register containing status flags that indicate the
normal reception of messages in mailboxes (buffers). For reception of a remote frame, when a bit
in this register is set to 1, the corresponding remote request register (RFPR) bit is also set to 1
simultaneously.
Bit Bit Name
15 RXPR7
14 RXPR6
13 RXPR5
12 RXPR4
11 RXPR3
10 RXPR2
9 RXPR1
8 RXPR0
7 RXPR15
6 RXPR14
5 RXPR13
4 RXPR12
3 RXPR11
2 RXPR10
1 RXPR9
0 RXPR8
Note: * Only 1 can be written to clear the flag.
Rev. 6.00 Mar 15, 2006 page 398 of 570
REJ09B0211-0600
Initial Value R/W
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
R/(W) *
0
Description
When the message in mailbox n (n = 0 to 15) has
been received error-free, RXPRn is set to 1.
[Setting condition]
•
Completion of message (data frame or
remote frame) reception in corresponding
mailbox
[Clearing condition]
•
Writing 1