Input/Output Pins; Register Descriptions; Table 14.1 Pin Configuration - Renesas H8S Series Hardware Manual

14.2

Input/Output Pins

Table 14.1 shows the serial pins for each SCI channel.

Table 14.1 Pin Configuration

Pin Name *
Channel
0 SCK0
RxD0
TxD0
1 SCK1
RxD1
TxD1
2 SCK2
RxD2
TxD2
Note: * Pin names SCK, RxD, and TxD are used in the text for all channels, omitting the
channel designation.
14.3

Register Descriptions

The SCI has the following registers for each channel. For details on register addresses and register
states during each process, refer to appendix A, On-Chip I/O Register. The serial mode register
(SMR), serial status register (SSR), and serial control register (SCR) are described separately for
normal serial communication interface mode and Smart Card interface mode because their bit
functions differ in part.
• Receive Shift Register (RSR)
• Receive Data Register (RDR)
• Transmit Data Register (TDR)
• Transmit Shift Register (TSR)
• Serial Mode Register (SMR)
• Serial Control Register (SCR)
• Serial Status Register (SSR)
• Smart Card Mode Register (SCMR)
• Bit Rate Register (BRR)
Section 14 Serial Communication Interface (SCI)
I/O Function
I/O SCI0 clock input/output
Input SCI0 receive data input
Output SCI0 transmit data output
I/O SCI1 clock input/output
Input SCI1 receive data input
Output SCI1 transmit data output
I/O SCI2 clock input/output
Input SCI2 receive data input
Output SCI2 transmit data output
Rev. 6.00 Mar 15, 2006 page 315 of 570
REJ09B0211-0600