Input/Output Pins; Register Descriptions; Table 12.1 Ppg I/O Pins - Renesas H8S Series Hardware Manual

12.2

Input/Output Pins

Table 12.1 summarizes the I/O pins of the PPG.

Table 12.1 PPG I/O Pins

Pin Name
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
12.3

Register Descriptions

The PPG has the following registers. For details on register addresses and register states during
each processing, refer to appendix A, On-Chip I/O Register.
• PPG output control register (PCR)
• PPG output mode register (PMR)
• Next data enable register H (NDERH)
• Next data enable register L (NDERL)
• Output data register H (PODRH)
• Output data register L (PODRL)
• Next data register H (NDRH)
• Next data register L (NDRL)
Section 12 Programmable Pulse Generator (PPG)
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Function
Group 3 pulse output
Group 2 pulse output
Rev. 6.00 Mar 15, 2006 page 283 of 570
REJ09B0211-0600