Intel Arria 10 User Manual page 85

2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Name
[8]
[9]
[19:10]
Table 64. Bit Encodings for 10GBASE-R , 10GBASE-KR with FEC
Name
rx_control
Table 65. Bit Encodings for Basic Single Width Mode
For basic single width mode, the total word length is 66-bit with 64-bit data and 2-bit synchronous header.
Name Bit
[1:0]
rx_control
[7:2]
[9:8]
[19:10]
Table 66. Bit Encodings for Basic Double Width Mode
For basic double width mode, total word length is 66-bit with 128-bit data, and 4-bit synchronous header.
Name Bit
[1:0]
rx_control
[7:2]
[8]
[9]
[11:10]
Bit Functionality
Synchronization header error, metaframe error,
or CRC32 error status
Block lock and frame lock status
Unused
Bit
[0]
XGMII control signal for
[1] XGMII control signal for
[2]
XGMII control signal for
[3]
XGMII control signal for
[4]
XGMII control signal for
[5]
XGMII control signal for
[6]
XGMII control signal for
[7]
XGMII control signal for
[19:8] Unused
Functionality
Synchronous header
Unused
Synchronous header error status
Unused
Functionality
Synchronous header
Unused
Synchronous header error status
Block lock is achieved
Synchronous header
A logic high (1'b1) indicates
synchronization header error,
metaframe error, or CRC32 error
status.
A logic high (1'b1) indicates that
block lock and frame lock have
been achieved.
Functionality
parallel_data[7:0]
parallel_data[15:8]
parallel_data[23:16]
parallel_data[31:24]
parallel_data[39:32]
parallel_data[47:40]
parallel_data[55:48]
parallel_data[63:56]
Description
The value 2'b01 indicates a data word. The value
2'b10 indicates a control word.
The value 2'b01 indicates a data word. The value
2'b10 indicates a control word.
Description
The value 2'b01 indicates a data word. The
value 2'b10 indicates a control word.
Active-high status signal that indicates a
synchronous header error.
Active-high status signal indicating when block
lock is achieved.
The value 2'b01 indicates a data word. The
value 2'b10 indicates a control word.
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Intel Arria 10 Transceiver PHY User Guide
Description
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