Intel Arria 10 User Manual page 115

2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Figure 45. Reset Condition
clock
tx_digitalreset
tx_parallel_data
2.6.1.2. Word Alignment for GbE, GbE with IEEE 1588v2
The word aligner for the GbE and GbE with IEEE 1588v2 protocols is configured in
automatic synchronization state machine mode. The software automatically configures
the synchronization state machine to indicate synchronization when the receiver
receives three consecutive synchronization ordered sets. A synchronization ordered
set is a /K28.5/ code group followed by an odd number of valid /Dx.y/ code groups.
The fastest way for the receiver to achieve synchronization is to receive three
continuous {/K28.5/, /Dx.y/} ordered sets.
The GbE PHY IP core signals receiver synchronization status on the
port of each channel. A high on the
synchronized; a low on the
of synchronization. The receiver loses synchronization when it detects three invalid
code groups separated by less than three valid code groups or when it is reset.
Table 90. Synchronization State Machine Parameter Settings for GbE
Synchronization State Machine Parameter
Number of word alignment patterns to achieve sync
Number of invalid data words to lose sync
Number of valid data words to decrement error count
The following figure shows
are sent through
K28.5 xxx K28.5 K28.5 K28.5
Automatically transmitted /K28.5/
rx_syncstatus
Setting
rx_syncstatus
rx_parallel_data
n + 1 n + 3
n n + 2 n + 4
Dx.y
Dx.y K28.5 Dx.y
User transmitted data
port indicates that the lane is
rx_syncstatus
port indicates that the lane has fallen out
3
3
3
high when three consecutive ordered sets
.
®
Intel Arria
K28.5 Dx.y K28.5 Dx.y
User transmitted synchronization sequence
rx_syncstatus
®
10 Transceiver PHY User Guide
115