Intel Arria 10 User Manual page 178

Signal Name
gmii_rx_err
led_char_err
led_link
led_disp_err
led_an
2.6.4.6.5. Serial Data Interface
Table 140. Serial Data Signals
Signal Name
rx_serial_data
tx_serial_data
2.6.4.6.6. Control and Status Interfaces
Table 141. Control and Status Signals
Signal Name
led_link
led_disp_err
led_an
led_panel_link
® ®
Intel Arria 10 Transceiver PHY User Guide
178
Direction
Output
Output
Output
Output
Output
Input
Output
Direction Clock Domain
Output Synchronous to
tx_clkout
Output Synchronous to
rx_clkout
Output Synchronous to
rx_clkout
Output Synchronous to
mgmt_clk
2. Implementing Protocols in Arria 10 Transceivers
The GMII RX error signal. Synchronous to
10-bit character error. Asserted for one
cycle when an erroneous 10-bit character is detected.
When asserted, this signal indicates successful link
synchronization.
When asserted, this signal indicates a 10-bit running
disparity error. Asserted for one
a disparity error is detected. A running disparity error
indicates that errors were detected on more received
groups than the previous and possibly current groups.
This signal indicates the auto-negotiation status. The PCS
function asserts this signal when an auto-negotiation
completes.
Direction
RX serial input data
TX serial output data
When asserted, indicates successful link synchronization.
Disparity error signal indicating a 10-bit running disparity
error. Asserted for one
disparity error is detected. A running disparity error
indicates that more than the previous and perhaps the
current received group had an error.
Clause 37 Auto-negotiation status. The PCS function
asserts this signal when auto-negotiation completes.
When asserted, this signal indicates the following
behavior:
Mode
1000 Base-X without Auto-
negotiation
UG-01143 | 2018.06.15
Description
tx_clkout
rx_clkout_1g
cycle when
rx_clkout_1g
Description
Description
cycle when a
rx_clkout_1g
Behavior
When asserted, indicates
successful link
synchronization.
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