®
1. Arria
10 Transceiver PHY Overview
UG-01143 | 2018.06.15
Document
Version
•
Updated figure "Arria 10 SX Device with 48,36, and 24 Transceiver Channels and Two PCIe Hard IP
Blocks.
•
Updated figure "Arria 10 SX Devices with Six Transceiver Channels and One PCIe Hard IP Block" to
add a clarification about PCIe Hard IP.
•
Updated the device package names in Table 1-5 in "Arria 10 SX Device Package Details" section.
•
Removed all references of the note about PCS-Direct support available in future release.
2013.12.02
Initial release.
Changes
®
®
Intel
Arria
10 Transceiver PHY User Guide
31