Intel Arria 10 User Manual page 304

The 8B/10B encoder and decoder add the following additional ports:
•
tx_datak
•
rx_datak
•
rx_errdetect
•
rx_disperr
•
rx_runningdisp
1. Set the RX word aligner mode to synchronous state machine.
2. Set the RX word aligner pattern length option according to the PCS-PMA
interface width.
3. Enter a hexadecimal value in the RX word aligner pattern (hex) field.
The RX word aligner pattern is the 8B/10B encoded version of the data pattern. You
can also specify the number of word alignment patterns to achieve synchronization,
the number of invalid data words to lose synchronization, and the number of valid
data words to decrement error count. This mode adds two additional ports:
rx_patterndetect
Note: •
rx_patterndetect
•
rx_syncstatus
•
rx_std_wa_patternalign
•
If there is more than one channel in the design,
rx_errdetect
rx_syncstatus
You can verify this feature by monitoring
Figure 136. Synchronization State Machine Mode when the PCS-PMA Interface Width is
20 Bits
rx_std_wa_patternalign
tx_parallel_data
rx_parallel_data
rx_runningdisp
rx_patterndetect
2.9.2.3. RX Bit Slip
To use the RX bit slip, select Enable rx_bitslip port and set the word aligner mode to
bit slip. This adds
rx_bitslip
slips one bit at a time on every active high edge. Assert the
least two parallel clock cycles to allow synchronization. You can verify this feature by
monitoring
® ®
Intel Arria 10 Transceiver PHY User Guide
304
and
rx_syncstatus
is asserted whenever there is a pattern match.
is asserted after the word aligner achieves synchronization.
,
rx_disperr
become buses in which each bit corresponds to one channel.
tx_datak 11
bc02
0000
rx_datak
00
rx_errdetect 11
rx_disperr 11
00
00
rx_syncstatus 00
rx_bitslip
slips one bit at a time. When
rx_parallel_data
2. Implementing Protocols in Arria 10 Transceivers
.
is asserted to re-align and re-synchronize.
tx_datak
, ,
rx_runningdisp
rx_parallel_data
02bc
01
00
00
11 00 11
01
as an input control port. An active high edge on
rx_bitslip
.
UG-01143 | 2018.06.15
, ,
rx_datak
, and
rx_patterndetect
.
00 11 00
11
is toggled, the word aligner
signal for at
rx_bitslip
11