Intel Arria 10 User Manual page 71

2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Parameter
Pre-Emphasis First Post-Tap
Polarity
Pre-Emphasis First Post-Tap
Magnitude
Pre-Emphasis Second Post-
Tap Polarity
Pre-Emphasis Second Post-
Tap Magnitude
Slew Rate Control
High-Speed Compensation
On-Chip termination
RX Analog PMA settings
Override Intel-recommended
Default settings
CTLE (Continuous Time
Linear Equalizer) mode
DC gain control of high gain
mode CTLE
AC Gain Control of High Gain
Mode CTLE
AC Gain Control of High Data
Rate Mode CTLE
Variable Gain Amplifier
(VGA) Voltage Swing Select
Decision Feedback Equalizer
(DFE) Fixed Tap 1 Co-
efficient
Decision Feedback Equalizer
(DFE) Fixed Tap 2 Co-
efficient
(31)
For more information refer to Available Options table in the
XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP section of the Analog Parameter
Settings chapter.
(32)
For more information refer to Available Options table in the
XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP section of the Analog Parameter
Settings chapter.
Value
Fir_post_1t_neg
Fir_post_1t_pos
(31)
0-25
Fir_post_2t_neg
Fir_post_2t_pos
(32)
0-12
to
slew_r0 slew_r5
Enable/Disable
r_r1
r_r2
On/Off
non_s1_mode
S1_mode
to
No_dc_gain stg4_gain7
to
radp_ctle_acgain_4s_0
radp_ctle_acgain_4s_28
radp_ctle_eqz_1s_sel_0
Radp_ctle_eqz_1s_sel_15
to
radp_vga_sel_0
radp_vga_sel_7
to
radp_dfe_fxtap1_0
radp_dfe_fxtap1_127
to
radp_dfe_fxtap2_0
radp_dfe_fxtap2_127
Selects the polarity of the first post-tap for pre-
emphasis
Selects the magnitude of the first post-tap for
pre-emphasis.
Selects the polarity of the second post-tap for
pre-emphasis.
Selects the magnitude of the second post-tap for
pre-emphasis
Selects the slew rate of the TX output signal. Valid
values span from slowest to the fastest rate.
Enables the power-distribution network (PDN)
induced inter-symbol interference (ISI)
compensation in the TX driver. When enabled, it
reduces the PDN induced ISI jitter, but increases
the power consumption.
Selects the on-chip TX differential termination.
Enables the option to override the Intel-
recommended settings for one or more RX analog
parameters
Selects between the RX high gain mode
or RX high data rate mode
non_s1_mode
for the Continuous Time Linear
s1_mode
Equalizer (CTLE).
Selects the DC gain of the Continuous Time Linear
Equalizer (CTLE) in high gain mode
Selects the AC gain of the Continuous Time Linear
Equalizer (CTLE) in high gain mode when CTLE is
in manual mode.
Selects the AC gain of the Continuous Time Linear
to
Equalizer (CTLE) in high data rate mode when
CTLE is in manual mode.
Selects the Variable Gain Amplifier (VGA) output
voltage swing when both the CTLE and DFE blocks
are in manual mode
Selects the co-efficient of the fixed tap 1 of the
Decision Feedback Equalizer (DFE) when
operating in manual mode
Selects the co-efficient of the fixed tap 2 of the
Decision Feedback Equalizer (DFE) when
operating in manual mode
®
Intel Arria
Description
continued...
®
10 Transceiver PHY User Guide
71