Intel Arria 10 User Manual page 189

2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Word Bit R/W
Addr
6 RO or
RW
7 RO or
RW
13:8 RO
0x4D4 14 RO
21:16 RO or
RW
22 RO or
RW
Name
For more information, refer to bit 10G BASE-KR LD coefficient
update register bits (1.154.5:0) in Clause 45.2.1.80.3 of IEEE
802.3ap-2007.
When set to 1, requests the link partner coefficients be set to
LD Initialize
configure the TX equalizer to its INITIALIZE state. When set to 0,
Coefficients
continues normal operation. For more information, refer to 10G
BASE-KR LD coefficient update register bits (1.154.12) in Clause
45.2.1.80.3 and Clause 72.6.10.2.3.2 of IEEE 802.3ap-2007.
When set to 1, requests the link partner coefficients be set to a
LD Preset
state where equalization is turned off. When set to 0 the link
Coefficients
operates normally. For more information, refer to bit 10GBASE-KR
LD coefficient update register bit (1.154.13) in Clause 45.2.1.80.3
and Clause 72.6.10.2.3.2 of IEEE 802.3ap-2007.
Status report register for the contents of the second, 16-bit word
LD coefficient
of the training frame most recently sent from the local device
status[5:0]
control channel. The following fields are defined:
•
•
•
For more information, refer to bit 10GBASE-KR LD status report
register bit (1.155.5:0) in Clause 45.2.1.81 of IEEE
802.3ap-2007.
When set to 1, the local device receiver has determined that
Link Training ready
training is complete and it is prepared to receive data. When set
- LD Receiver ready
to 0, the local device receiver requests that training continue.
Values for the receiver ready bit are defined in Clause
72.6.10.2.4.4. For more information, refer to bit 10GBASE-KR LD
status report register bit (1.155.15) in Clause 45.2.1.81 of IEEE
802.3ap-2007.
Reflects the contents of the first 16-bit word of the training frame
LP coefficient
most recently received from the control channel.
update[5:0]
Normally the bits in this register are read only; however, when
training is disabled by setting low the KR training enable control
bit, these bits become writable. The following fields are defined:
•
•
•
For more information, refer to bit 10GBASE-KR LP coefficient
update register bits (1.152.5:0) in Clause 45.2.1.78.3 of IEEE
802.3ap-2007.
When set to 1, the local device transmit equalizer coefficients are
LP Initialize
set to the INITIALIZE state. When set to 0, normal operation
Coefficients
continues. The function and values of the initialize bit are defined
in Clause 72.6.10.2.3.2. For more information, refer to bit
10GBASE-KR LP coefficient update register bits (1.152.12) in
Clause 45.2.1.78.3 of IEEE 802.3ap-2007.
Description
[5:4]: Coefficient (post-tap)
— 2'b11: Maximum
— 2'b01: Minimum
— 2'b10: Updated
— 2'b00: Not updated
[3:2]: Coefficient (0) (same encoding as [5:4])
[1:0]: Coefficient (pre-tap) (same encoding as [5:4])
[5: 4]: Coefficient (+1) update
— 2'b11: Reserved
— 2'b01: Increment
— 2'b10: Decrement
— 2'b00: Hold
[3:2]: Coefficient (0) update (same encoding as [5:4])
[1:0]: Coefficient (-1) update (same encoding as [5:4])
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Intel Arria
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10 Transceiver PHY User Guide
189