Intel Arria 10 User Manual page 59

Transceiver phy
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2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Parameter
Enable tx_enh_frame
port
Enable
tx_enh_frame_diag_st
atus port
Enable
tx_enh_frame_burst_e
n port
Table 21.
Interlaken Frame Synchronizer Parameters
Parameter
Enable Interlaken
frame synchronizer
Frame synchronizer
metaframe length
Enable rx_enh_frame
port
Enable
rx_enh_frame_lock
port
Enable
rx_enh_frame_diag_st
atus port
Table 22.
Interlaken CRC32 Generator and Checker Parameters
Parameter
Enable Interlaken TX
CRC-32 Generator
Enable Interlaken TX
CRC-32 generator
error insertion
Enable Interlaken RX
CRC-32 checker
Enable
rx_enh_crc32_err port
Range
On / Off
Enables the
Interlaken frame generator is enabled, this signal indicates the
beginning of a new metaframe. This is an asynchronous signal.
On / Off
Enables the
When the Interlaken frame generator is enabled, the value of this
signal contains the status message from the framing layer
diagnostic word. This signal is synchronous to
On / Off
Enables the
control is enabled for the Interlaken frame generator, this signal is
asserted to control the frame generator data reads from the TX
FIFO. This signal is synchronous to
Range
On / Off
When you turn on this option, the Enhanced PCS frame
synchronizer is enabled.
5-8192
Specifies the metaframe length of the frame synchronizer.
On / Off
Enables the rx_enh_frame status output port. When the
Interlaken frame synchronizer is enabled, this signal indicates the
beginning of a new metaframe. This is an asynchronous signal.
On / Off
Enables the rx_enh_frame_lock output port. When the
Interlaken frame synchronizer is enabled, this signal is asserted to
indicate that the frame synchronizer has achieved metaframe
delineation. This is an asynchronous output signal.
On / Off
Enables therx_enh_frame_diag_status output port. When the
Interlaken frame synchronizer is enabled, this signal contains the
value of the framing layer diagnostic word (bits [33:32]). This is a
2 bit per lane output signal. It is latched when a valid diagnostic
word is received. This is an asynchronous signal.
Range
On / Off
When you turn on this option, the TX Enhanced PCS datapath
enables the CRC32 generator function. CRC32 can be used as a
diagnostic tool. The CRC contains the entire metaframe including
the diagnostic word.
On / Off
When you turn on this option, the error insertion of the interlaken
CRC-32 generator is enabled. Error insertion is cycle-accurate.
When this feature is enabled, the assertion of
tx_err_ins
incorrectly inverted, and thus, the CRC created for that metaframe
is incorrect.
On / Off
Enables the CRC-32 checker function.
On / Off
When you turn on this option, the Enhanced PCS enables the
rx_enh_crc32_err port. This signal is asserted to indicate that
the CRC checker has found an error in the current metaframe.
This is an asynchronous signal.
Description
status output port. When the
tx_enh_frame
tx_enh_frame_diag_status
input port. When burst
tx_enh_frame_burst_en
tx_clkout
Description
Description
signal causes the CRC calculation during that word is
®
®
Intel
Arria
10 Transceiver PHY User Guide
2-bit input port.
.
tx_clkout
.
or
tx_control[8]
59

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