Intel Arria 10 User Manual page 592

Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM <value>
-to <rx_serial_data pin name>
Related Information
Arria 10 Device Datasheet
8.5.1.3. XCVR_A10_RX_ADP_CTLE_ACGAIN_4S
Pin planner or Assignment Editor Name
Receiver High Gain Mode Equalizer AC Gain Control
Description
Controls the AC gain of the continuous time linear equalizer (CTLE) in high gain mode.
Arria 10 transceivers support two CTLE modes, high gain mode and high data rate
mode. As a default, high data rate mode is enabled for data rates up to 25.8 Gbps.
High gain mode can be enabled for datarate less than or equal to 17.4Gbps Higher
gain setting results in larger AC gain.
he default value for PCIe Gen3 is RADP_CTLE_ACGAIN_4S_7.
For all the other cases, the default value is RADP_CTLE_ACGAIN_4S_1.
Table 311. Available Options
RADP_CTLE_ACGAIN_4S_<0 to 28>
Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S
<value> -to <rx_serial_data pin name>
8.5.1.4. XCVR_A10_RX_ADP_CTLE_EQZ_1S_SEL
Pin planner or Assignment Editor Name
Receiver High Data Rate Mode Equalizer AC Gain Control
Description
Controls the AC gain of the continuous time linear equalizer (CTLE) in high data rate
mode and when adaptation is in manual mode (adaptation is disabled).
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Intel Arria 10 Transceiver PHY User Guide
592
Value
8. Analog Parameter Settings
UG-01143 | 2018.06.15
Description
CTLE AC gain setting <0 to 28>