Intel Arria 10 User Manual page 591

8. Analog Parameter Settings
UG-01143 | 2018.06.15
Table 309. Available Options
Value in QSF
NON_S1_MODE
S1_MODE
Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE
<value> -to <rx_serial_data pin name>
8.5.1.2. XCVR_A10_RX_EQ_DC_GAIN_TRIM
Pin planner or Assignment Editor Name
Receiver High Gain Mode Equalizer DC Gain Control
Description
Controls the DC gain of the continuous time linear equalizer (CTLE) in high gain mode.
A higher gain setting results in a larger DC gain.
For RX_LINK=SR, the default value is STG2_GAIN7.
For RX_LINK=LR, and if equalization mode = S1_MODE, default value of DC gain is
STG1_GAIN7.
For RX_LINK=LR, and if equalization mode = NON_S1_MODE, default value of DC gain
is NO_DC_GAIN.
For PCIe, default value is NO_DC_GAIN.
For datarate > 17.4 Gbps, default value is NO_DC_GAIN.
Table 310. Available Options
Value in TTK
DC Gain 0
DC Gain 1
DC Gain 2
DC Gain 3
DC Gain 4
(66)
Refer to Arria 10 Data Sheet
Value in Assignment
Editor
Off Selects high gain mode for data rates up to 17.4 Gbps.
On Selects high data rate mode up to 25.8 Gbps. Power consumption
reduces in high data rate mode, as compared to high gain mode, when
operating below 17.4 Gbps. This mode is the only option above 17.4
Gbps.
Value in Assignment Editor / qsf
NO_DC_GAIN
STG1_GAIN7
STG2_GAIN7
STG3_GAIN7
STG4_GAIN7
Description
(66)
Description
No DC gain
Equalizer DC gain setting 6
Equalizer DC gain setting 13
Equalizer DC gain setting 20
Equalizer DC gain setting 27
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Intel Arria 10 Transceiver PHY User Guide
591