Intel Arria 10 User Manual page 422

Transceiver phy
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Clock Data Recovery in Auto Lock Mode
The step numbers correspond to the numbers in the following figure:
1. Assert
low. You must reset the PCS by asserting
assert
2. Deassert
3. Ensure
deasserting
Figure 203. Resetting the Receiver During Device Operation (Auto Mode)
Note:
rx_is_lockedtodata
rx_is_lockedtoref
Clock Data Recovery in Manual Lock Mode
Use the clock data recovery (CDR) manual lock mode to override the default CDR
automatic lock mode depending on your design requirements.
Related Information
"Transceiver PHY Reset Controller IP Core" chapter of the Altera Transceiver PHY IP
Core User Guide.
Refer to the description of the
table for information about using the manual lock mode.
Control Settings for CDR Manual Lock Mode
Use the following control settings to set the CDR lock mode:
Table 245.
Control Settings for the CDR in Manual Lock Mode
rx_set_locktoref
0
1
X
®
®
Intel
Arria
10 Transceiver PHY User Guide
422
and
rx_analogreset
.
rx_analogreset
after a minimum duration of 70 μs.
rx_analogreset
rx_is_lockedtodata
rx_digitalreset
Device Power Up
rx_cal_busy
rx_analogreset
rx_is_lockedtodata
rx_digitalreset
t
= 70 μs
req
1
will toggle when there is no data at the receiver input.
is a don't care when
rx_set_locktodata
0
0
1
. Ensure that
rx_digitalreset
rx_digitalreset
is asserted for t
(minimum of 4 μs) before
LTD
.
t
req
2
rx_is_lockedtodata
signal in the "Top-Level Signals"
rx_digitalreset
Automatic
Manual-RX CDR LTR
Manual-RX CDR LTD
4. Resetting Transceiver Channels
UG-01143 | 2018.06.15
rx_cal_busy
every time you
t
min 4 μs
LTD
3
is asserted.
CDR Lock Mode
is

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