Intel Arria 10 User Manual page 110

Table 82. Interlaken CRC-32 Generator and Checker Parameters
Enable Interlaken TX CRC-32 generator
Enable Interlaken TX CRC-32 generator error
insertion
Enable Interlaken RX CRC-32 checker
Enable rx_enh_crc32_err port
Table 83. Scrambler and Descrambler Parameters
Enable TX scrambler (10GBASE-R / Interlaken)
TX scrambler seed (10GBASE-R / Interlaken)
Enable RX descrambler (10GBASE-R / Interlaken)
Table 84. Interlaken Disparity Generator and Checker Parameters
Enable Interlaken TX disparity generator
Enable Interlaken RX disparity checker
Enable Interlaken TX random disparity bit
Table 85. Block Sync Parameters
Enable RX block synchronizer
Enable rx_enh_blk_lock port
Table 86. Gearbox Parameters
Enable TX data bitslip
Enable TX data polarity inversion
Enable RX data bitslip
Enable RX data polarity inversion
Enable tx_enh_bitslip port
Enable rx_bitslip port
Table 87. Dynamic Reconfiguration Parameters
Enable dynamic reconfiguration
Share reconfiguration interface
Enable Altera Debug Master Endpoint
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Intel Arria 10 Transceiver PHY User Guide
110
Parameter
Parameter
Parameter
Parameter
Parameter
Parameter
2. Implementing Protocols in Arria 10 Transceivers
Value
On
On / Off
On
On / Off
Value
On
0x1 to 0x3FFFFFFFFFFFFFF
On
Value
On
On
On / Off
Value
On
On / Off
Value
Off
On / Off
Off
On / Off
Off
Off
Value
On / Off
On / Off
On / Off
UG-01143 | 2018.06.15
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