Intel Arria 10 User Manual page 122

DFE adaptation mode
Number of fixed dfe taps
Enable rx_pma_clkout port
Enable rx_pma_div_clkout port
rx_pma_div_clkout division factor
Enable rx_pma_iqtxrx_clkout port
Enable rx_pma_clkslip port
Enable rx_pma_qpipulldn port (QPI)
Enable rx_is_lockedtodata port
Enable rx_is_lockedtoref port
Enable rx_set_locktodata and rx_set_locktoref ports
Enable rx_seriallpbken port
Enable PRBS verifier control and status ports
Table 94. Standard PCS Parameters
Standard PCS / PMA interface width
FPGA fabric / Standard TX PCS interface width
FPGA fabric / Standard RX PCS interface width
Enable Standard PCS low latency mode
TX FIFO mode
RX FIFO mode
Enable tx_std_pcfifo_full port
Enable tx_std_pcfifo_empty port
Enable rx_std_pcfifo_full port
Enable rx_std_pcfifo_empty port
TX byte serializer mode
RX byte deserializer mode
Enable TX 8B/10B encoder
Enable TX 8B/10B disparity control
Enable RX 8B/10B decoder
RX rate match FIFO mode
RX rate match insert / delete -ve pattern (hex)
® ®
Intel Arria 10 Transceiver PHY User Guide
122
Parameter
Parameters
2. Implementing Protocols in Arria 10 Transceivers
Value
disabled
On/Off
On/Off
Disabled, 1, 2, 33, 40, 66
On/Off
On/Off
On/Off
On/Off
On/Off
On/Off
On/Off
Value
low latency (for GbE)
register_fifo (for GbE with IEEE 1588v2)
low latency (for GbE)
register_fifo (for GbE with IEEE 1588v2)
On/Off
On/Off
On/Off
On/Off
Disabled
Disabled
On/Off
gige (for GbE)
disabled (for GbE with IEEE 1588v2)
(/K28.5/D2.2/) (for GbE)
0x000ab683
(disabled for GbE with IEEE
0x00000000
1588v2)
UG-01143 | 2018.06.15
N/A
Off
10
8
8
Off
On
On
continued...