Intel Arria 10 User Manual page 14

Figure 5. Arria 10 GX Devices with 48, 36, and 24 Transceiver Channels and Two PCIe
Hard IP Blocks
CH5
CH4
CH3
CH2
CH1
CH0
Note:
(1) These devices have transceivers only on the left hand side of the device.
Legend:
PCIe Gen1 - Gen3 Hard IP blocks with Configuration via Protocol (CvP) capabilities.
PCIe Gen1 - Gen3 Hard IP blocks without Configuration via Protocol (CvP) capabilities.
Arria 10 GX device with 48 transceiver channels and two PCIe Hard IP blocks.
Arria 10 GX device with 36 transceiver channels and two PCIe Hard IP blocks.
Arria 10 GX device with 24 transceiver channels and two PCIe Hard IP blocks.
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Intel Arria 10 Transceiver PHY User Guide
14
GXBL1J GXBL1J
Transceiver
Bank
GXBL1I GXBL1I
GXBL1H GXBL1H
GXBL1G GXBL1G
GXBL1F GXBL1F
GXBL1E GXBL1E
GXBL1D GXBL1D
GXBL1C GXBL1C
1. Arria
GX 115 NF40
Transceiver Transceiver GX 090 NF40
Bank Bank GX 066 NF40
GX 057 NF40
Transceiver Transceiver
Bank Bank
GX 066 KF40
GX 057 KF40
Transceiver Transceiver
GX 066 KF35
Bank Bank
GX 057 KF35
GX 048 KF35
Transceiver Transceiver
Bank Bank
GX 115 HF34
Transceiver Transceiver
GX 090 HF34
PCIe
Bank Bank
GX 066 HF34
Gen1 - Gen3
GX 057 HF34
Hard IP
GX 048 HF34
GX 032 HF35
GX 032 HF34
Transceiver Transceiver
GX 027 HF35
Bank Bank
GX 027 HF34
Transceiver Transceiver
PCIe
Bank Bank
Gen1 - Gen3
Hard IP
(with CvP)
Transceiver Transceiver
Bank Bank
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10 Transceiver PHY Overview
UG-01143 | 2018.06.15