Intel Arria 10 User Manual page 320

Figure 161. GT Channel Configuration
ATX PLL1
ATX PLL0
When both the channels 0 and 1 are configured as GT channels, they are driven by
the same ATX PLL and have to be configured to run at the same data rates. This is
also true for channels 3 and 4 when they are configured as GT channels.
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Intel Arria 10 Transceiver PHY User Guide
320
2. Implementing Protocols in Arria 10 Transceivers
CGB
CGB
CGB
CGB
CGB
CGB
UG-01143 | 2018.06.15
Ch 5
CDR
Ch 4
CMU or CDR
Ch 3
CDR
Ch 2
CDR
Ch 1
CMU or CDR
Ch 0
CDR