Intel Arria 10 User Manual page 464

5.2.1.2. Interlaken Frame Generator
The Interlaken frame generator block takes the data from the TX FIFO and
encapsulates the payload and burst/idle control words from the FPGA fabric with the
framing layer's control words (synchronization word, scrambler state word, skip word,
and diagnostic word) to form a metaframe. The Native PHY IP Parameter Editor allows
you to set the metaframe length from five 8-byte words to a maximum value of 8192
(64Kbyte words).
Use the same value on frame generator metaframe length for the transmitter and
receiver.
Figure 237. Interlaken Frame Generator
The Interlaken frame generator implements the Interlaken protocol.
From TX FIFO
Synchronization
5.2.1.3. Interlaken CRC-32 Generator
The Interlaken CRC-32 generator block receives data from the Interlaken frame
generator and calculates the cyclic redundancy check (CRC) code for each block of
data. This CRC code value is stored in the CRC32 field of the diagnostic word. CRC-32
provides a diagnostic tool for each lane. This helps to trace the errors on the interface
back to an individual lane.
The CRC-32 calculation covers most of the metaframe, including the diagnostic word,
except the following:
• Bits [66:64] of each word
• 58-bit scrambler state within the scrambler state word
• 32-bit CRC-32 field within the diagnostic word
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Intel Arria 10 Transceiver PHY User Guide
464
Interlaken
64-Bit Data
Frame
1-Bit Control
Generator
Scrambler
Skip Word 66 65 64 63
State Word
Data
Sync Header
Inversion Bit (Place Holder for Bit Inversion Information)
Used for Clock Compensation in a Repeater
Used to Synchronize the Scrambler
Used to Align the Lanes of the Bundle
5. Arria 10 Transceiver PHY Architecture
UG-01143 | 2018.06.15
66-Bit Blocks
Payload
0 66 0 66
To Interlaken
CRC-32 Generator
0 Di
Provides Per
Lane Error Check
and Optional Status
Message